No, it is just the only really device specific code that is able to start an OS if it provides a valid bootflow. In x86 terminology, this is the BIOS.
With this in place you are able to place an OS image (fedora, DietPi, Armbian, …) alongside, be it via NVME, USB, microSD or eMMC, and it is able to start it.
If you want to colocate it in the OS image, you have to ensure the partition layout of the OS spares the firmware area.
This is not the case with fedora, for example. If the firmware is e.g. in the eMMC, the OS image should reside in NVME, USB or microSD.
That’s why I prefer devices with SPI NOR Flash for firmware, but it is not really a showstopper.
Ok, have had an extremely busy past month but finally have some time to try this.
to dd your firmware onto a storage device do I need to partition it first? so if I will attept with SD card, dd to /dev/sda or /dev/sda1 after partitioning?
And then if I have a .img file for an OS installer, does that belong in the same partition as your firmware? Or are you saying it goes on a completely different device, e.g. your firmware on SD card, OS on eMMC? (afaik there’s no SPI NOR flash chip on this device)
Partition layouts are datastuctures obeyed by OS, MASK ROM code has no knowledge
about it. It does only absolut device addressing. Hence the “entire device to
be used” (e.g. /dev/sda).
@usual-user - was finally able to attempt. I get no response from the device with either combination, u-boot-rockchip.bin copied onto SD-card or onto eMMC, have tried with fedora’s .raw image for aarch64 on the other device in both cases. if there’s a different OS image I should try with please suggest, but so far when u-boot-rockchip.bin is on either storage device, the SBC gives zero response when powered on. Thanks!
Which kernel does Fedora use? And which Mesa sources in case?
E.g. there is this “panfork” project which provides better hardware acceleration for RK3588 SoC, but AFAIK RK356x should work fine with recent mainline Mesa in the meantime.
I do not know what you expect, but all firmwares with U-Boot as payload have at least Rockchip’s TPL-BLOB embedded, which is executed first. In doing so, it emits a similar boot splat as this one via the serial debug console:
.DDR f8ac117e9c typ 24/06/21-08:46:58,fwver: v1.22
In
wdqs_if: 0x1010100
LP4/4x derate en, other dram:1x trefi
ddrconfig:7
MID:0x6
LPDDR4X, 324MHz
BW=32 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=8192MB
tdqss_lf: cs0 dqs0: 48ps, dqs1: -96ps, dqs2: -72ps, dqs3: -144ps,
tdqss_lf: cs1 dqs0: 48ps, dqs1: -96ps, dqs2: -48ps, dqs3: -144ps,
tdqss_hf: cs0 dqs0: 48ps, dqs1: -96ps, dqs2: -72ps, dqs3: -144ps,
tdqss_hf: cs1 dqs0: 48ps, dqs1: -96ps, dqs2: -48ps, dqs3: -144ps,
change to: 324MHz
PHY drv:clk:36,ca:36,DQ:29,odt:240
vrefinner:16%, vrefout:41%
dram drv:40,odt:0
clk skew:0x61
change to: 528MHz
PHY drv:clk:36,ca:36,DQ:29,odt:240
vrefinner:16%, vrefout:41%
dram drv:40,odt:0
clk skew:0x58
change to: 780MHz
PHY drv:clk:36,ca:36,DQ:29,odt:60
vrefinner:16%, vrefout:41%
dram drv:40,odt:0
clk skew:0x58
rx vref: 15.6%
tx vref: 32.0%
change to: 1560MHz(final freq)
PHY drv:clk:36,ca:36,DQ:29,odt:60
vrefinner:16%, vrefout:22%
dram drv:40,odt:80
vref_ca:00000071
clk skew:0x21
rx vref: 17.6%
tx vref: 21.8%
cs 0:
rdtrn RS:
DQS0:0x2f, DQS1:0x35, DQS2:0x37, DQS3:0x2a,
min : 0xb 0xc 0x10 0xd 0x1 0x5 0x7 0x3 , 0xb 0xb 0x2 0x5 0x10 0xc 0xd 0xc ,
0x13 0x14 0xd 0xc 0x6 0x2 0x4 0x9 , 0xa 0x5 0x5 0x2 0xd 0xc 0x8 0xd ,
mid :0x27 0x27 0x2b 0x28 0x1b 0x1e 0x21 0x1e ,0x26 0x24 0x1c 0x20 0x2a 0x25 0x27 0x27 ,
0x2e 0x2e 0x26 0x27 0x21 0x1d 0x1f 0x23 ,0x22 0x1f 0x1e 0x1b 0x28 0x27 0x22 0x28 ,
max :0x43 0x42 0x46 0x44 0x36 0x38 0x3c 0x39 ,0x42 0x3e 0x37 0x3b 0x45 0x3f 0x42 0x42 ,
0x4a 0x49 0x40 0x42 0x3c 0x38 0x3b 0x3e ,0x3b 0x3a 0x37 0x34 0x44 0x42 0x3d 0x44 ,
range:0x38 0x36 0x36 0x37 0x35 0x33 0x35 0x36 ,0x37 0x33 0x35 0x36 0x35 0x33 0x35 0x36 ,
0x37 0x35 0x33 0x36 0x36 0x36 0x37 0x35 ,0x31 0x35 0x32 0x32 0x37 0x36 0x35 0x37 ,
wrtrn RS:
DQS0:0x2a, DQS1:0xe, DQS2:0x13, DQS3:0x5,
min :0x72 0x75 0x77 0x73 0x63 0x68 0x6e 0x6c 0x6a ,0x4f 0x4c 0x48 0x45 0x52 0x4f 0x51 0x4f 0x4a ,
0x60 0x5f 0x5a 0x57 0x54 0x4f 0x50 0x57 0x55 ,0x4d 0x48 0x48 0x41 0x4f 0x4f 0x4a 0x53 0x45 ,
mid :0x8d 0x90 0x92 0x8e 0x7d 0x82 0x88 0x86 0x83 ,0x6a 0x67 0x60 0x5e 0x6c 0x68 0x6a 0x68 0x63 ,
0x7c 0x7b 0x75 0x72 0x6d 0x69 0x6b 0x71 0x70 ,0x67 0x62 0x62 0x5b 0x69 0x69 0x65 0x6d 0x60 ,
max :0xa9 0xab 0xad 0xa9 0x98 0x9d 0xa2 0xa1 0x9d ,0x86 0x82 0x79 0x78 0x86 0x82 0x84 0x82 0x7c ,
0x98 0x98 0x91 0x8e 0x87 0x84 0x87 0x8c 0x8c ,0x81 0x7d 0x7c 0x76 0x84 0x84 0x81 0x87 0x7b ,
range:0x37 0x36 0x36 0x36 0x35 0x35 0x34 0x35 0x33 ,0x37 0x36 0x31 0x33 0x34 0x33 0x33 0x33 0x32 ,
0x38 0x39 0x37 0x37 0x33 0x35 0x37 0x35 0x37 ,0x34 0x35 0x34 0x35 0x35 0x35 0x37 0x34 0x36 ,
cs 1:
rdtrn RS:
DQS0:0x2f, DQS1:0x35, DQS2:0x37, DQS3:0x2a,
min : 0xb 0xc 0x10 0xd 0x1 0x5 0x7 0x3 , 0xb 0xb 0x2 0x5 0x10 0xc 0xd 0xc ,
0x13 0x14 0xd 0xc 0x6 0x2 0x4 0x9 , 0xa 0x5 0x5 0x2 0xd 0xc 0x8 0xd ,
mid :0x27 0x27 0x2b 0x28 0x1b 0x1e 0x21 0x1e ,0x26 0x24 0x1c 0x20 0x2a 0x25 0x27 0x27 ,
0x2e 0x2e 0x26 0x27 0x21 0x1d 0x1f 0x23 ,0x22 0x1f 0x1e 0x1b 0x28 0x27 0x22 0x28 ,
max :0x43 0x42 0x46 0x44 0x36 0x38 0x3c 0x39 ,0x42 0x3e 0x37 0x3b 0x45 0x3f 0x42 0x42 ,
0x4a 0x49 0x40 0x42 0x3c 0x38 0x3b 0x3e ,0x3b 0x3a 0x37 0x34 0x44 0x42 0x3d 0x44 ,
range:0x38 0x36 0x36 0x37 0x35 0x33 0x35 0x36 ,0x37 0x33 0x35 0x36 0x35 0x33 0x35 0x36 ,
0x37 0x35 0x33 0x36 0x36 0x36 0x37 0x35 ,0x31 0x35 0x32 0x32 0x37 0x36 0x35 0x37 ,
wrtrn RS:
DQS0:0x2a, DQS1:0xe, DQS2:0x13, DQS3:0x5,
min :0x72 0x75 0x77 0x73 0x63 0x68 0x6e 0x6c 0x6a ,0x4f 0x4c 0x48 0x45 0x52 0x4f 0x51 0x4f 0x4a ,
0x60 0x5f 0x5a 0x57 0x54 0x4f 0x50 0x57 0x55 ,0x4d 0x48 0x48 0x41 0x4f 0x4f 0x4a 0x53 0x45 ,
mid :0x8d 0x90 0x92 0x8e 0x7d 0x82 0x88 0x86 0x83 ,0x6a 0x67 0x60 0x5e 0x6c 0x68 0x6a 0x68 0x63 ,
0x7c 0x7b 0x75 0x72 0x6d 0x69 0x6b 0x71 0x70 ,0x67 0x62 0x62 0x5b 0x69 0x69 0x65 0x6d 0x60 ,
max :0xa9 0xab 0xad 0xa9 0x98 0x9d 0xa2 0xa1 0x9d ,0x86 0x82 0x79 0x78 0x86 0x82 0x84 0x82 0x7c ,
0x98 0x98 0x91 0x8e 0x87 0x84 0x87 0x8c 0x8c ,0x81 0x7d 0x7c 0x76 0x84 0x84 0x81 0x87 0x7b ,
range:0x37 0x36 0x36 0x36 0x35 0x35 0x34 0x35 0x33 ,0x37 0x36 0x31 0x33 0x34 0x33 0x33 0x33 0x32 ,
0x38 0x39 0x37 0x37 0x33 0x35 0x37 0x35 0x37 ,0x34 0x35 0x34 0x35 0x35 0x35 0x37 0x34 0x36 ,
cs 1:
rdtrn RS:
DQS0:0x2f, DQS1:0x35, DQS2:0x37, DQS3:0x2a,
min : 0xb 0xc 0x10 0xd 0x1 0x5 0x7 0x3 , 0xb 0xb 0x2 0x5 0x10 0xc 0xd 0xc ,
0x13 0x14 0xd 0xc 0x6 0x2 0x4 0x9 , 0xa 0x5 0x5 0x2 0xd 0xc 0x8 0xd ,
mid :0x27 0x27 0x2b 0x28 0x1b 0x1e 0x21 0x1e ,0x26 0x24 0x1c 0x20 0x2a 0x25 0x27 0x27 ,
0x2e 0x2e 0x26 0x27 0x21 0x1d 0x1f 0x23 ,0x22 0x1f 0x1e 0x1b 0x28 0x27 0x22 0x28 ,
max :0x43 0x42 0x46 0x44 0x36 0x38 0x3c 0x39 ,0x42 0x3e 0x37 0x3b 0x45 0x3f 0x42 0x42 ,
0x4a 0x49 0x40 0x42 0x3c 0x38 0x3b 0x3e ,0x3b 0x3a 0x37 0x34 0x44 0x42 0x3d 0x44 ,
range:0x38 0x36 0x36 0x37 0x35 0x33 0x35 0x36 ,0x37 0x33 0x35 0x36 0x35 0x33 0x35 0x36 ,
0x37 0x35 0x33 0x36 0x36 0x36 0x37 0x35 ,0x31 0x35 0x32 0x32 0x37 0x36 0x35 0x37 ,
wrtrn RS:
DQS0:0x2a, DQS1:0xe, DQS2:0x13, DQS3:0x5,
min :0x72 0x75 0x77 0x73 0x63 0x68 0x6e 0x6c 0x6a ,0x4f 0x4c 0x48 0x45 0x52 0x4f 0x51 0x4f 0x4a ,
0x60 0x5f 0x5a 0x57 0x54 0x4f 0x50 0x57 0x55 ,0x4d 0x48 0x48 0x41 0x4f 0x4f 0x4a 0x53 0x45 ,
mid :0x8d 0x90 0x92 0x8e 0x7d 0x82 0x88 0x86 0x83 ,0x6a 0x67 0x60 0x5e 0x6c 0x68 0x6a 0x68 0x63 ,
0x7c 0x7b 0x75 0x72 0x6d 0x69 0x6b 0x71 0x70 ,0x67 0x62 0x62 0x5b 0x69 0x69 0x65 0x6d 0x60 ,
max :0xa9 0xab 0xad 0xa9 0x98 0x9d 0xa2 0xa1 0x9d ,0x86 0x82 0x79 0x78 0x86 0x82 0x84 0x82 0x7c ,
0x98 0x98 0x91 0x8e 0x87 0x84 0x87 0x8c 0x8c ,0x81 0x7d 0x7c 0x76 0x84 0x84 0x81 0x87 0x7b ,
range:0x37 0x36 0x36 0x36 0x35 0x35 0x34 0x35 0x33 ,0x37 0x36 0x31 0x33 0x34 0x33 0x33 0x33 0x32 ,
0x38 0x39 0x37 0x37 0x33 0x35 0x37 0x35 0x37 ,0x34 0x35 0x34 0x35 0x35 0x35 0x37 0x34 0x36 ,
CBT RS:
cs:0 min :0x54 0x52 0x4a 0x41 0x49 0x3e 0x4e ,0x4f 0x48 0x45 0x3e 0x47 0x3e 0x4c ,
cs:0 mid :0x90 0x91 0x85 0x82 0x85 0x7e 0x7e ,0x8b 0x8a 0x80 0x7e 0x82 0x7f 0x7c ,
cs:0 max :0xcc 0xd1 0xc1 0xc4 0xc2 0xbf 0xaf ,0xc7 0xcc 0xbc 0xbf 0xbd 0xc0 0xac ,
cs:0 range:0x78 0x7f 0x77 0x83 0x79 0x81 0x61 ,0x78 0x84 0x77 0x81 0x76 0x82 0x60 ,
cs:1 min :0x50 0x57 0x45 0x48 0x49 0x45 0x52 ,0x4d 0x4d 0x42 0x43 0x42 0x45 0x4b ,
cs:1 mid :0x91 0x91 0x86 0x84 0x87 0x7f 0x83 ,0x8d 0x8a 0x82 0x7e 0x83 0x7f 0x7e ,
cs:1 max :0xd3 0xcb 0xc7 0xc0 0xc6 0xba 0xb5 ,0xce 0xc7 0xc2 0xb9 0xc4 0xba 0xb2 ,
cs:1 range:0x83 0x74 0x82 0x78 0x7d 0x75 0x63 ,0x81 0x7a 0x80 0x76 0x82 0x75 0x67 ,
out
If this does not happen, either the firmware is not proper placed in the boot device, or the MASK-ROM code does not execute the firmware from the planned boot device. The following components (U-Boot SPL and U-Boot itself) also only output messages via the serial debug console, as there is currently no HDMI support with a standard build from mainline sources.
If you think you could tinker with firmware and eliminate issues by observing blinking LEDs or by trial and error, be my guest, but do not expect any help from my side. Only proper logs from the debug console provide useful information to know what is going on.
Since I haven’t started a native Fedora image in a long time, I’m not sure if the UEFI boot software outputs its messages also only through the serial debug console, as the firmware does not provide any other console device (e.g. via HDMI) for this purpose. The kernel of the OS with the corresponding HDMI support only starts afterwards.
For me, none of this is a show-stopper, as I do not use the UEFI bootflow and the firmware of my devices is equipped with suitable HDMI support.
Fedora builds from current mainline releases and offers regular updates.
(kernel mesa use the “Builds Status” button to see which versions where available)
Since I`m on Rawhide and upgrade weekly, I had them all. Whereby I regularly rebuild the kernel binary according to my preferences.
I prefer the conformance that Panthor offers me (e.g. PanVK).
1 Like
Then I am not sure why Chromium does not show GPU acceleration on DietPi, while it does not Fedora. The Panthor driver is also shipped with the kernel, but IIRC would need to be enabled via device tree overlay.
EDIT: panthor kernel module is available OOTB. Not loaded by default, but panfrost instead. It is either one of the other, isn’t it?
I’ll just test it myself.
Okay very interesting: --use-gl=egl needs to be removed from the Chromium arguments, i.e. from /etc/chromium.d/dietpi.
libegl1 is installed, of course.
… okay logs give a hint:
Requested GL implementation (gl=egl-gles2,angle=none) not found in allowed implementations: [(gl=egl-angle,angle=default)].
No idea why it explicitly tries to not use ANGLE. When passing --use-gl=egl --use-angle=default, it shows
Requested GL implementation (gl=none,angle=none) not found in allowed implementations: [(gl=egl-angle,angle=default)].
I say use EGL and ANGLE, and it interprets as both “none” 
.
What does work is --use-angle=default, without defining --use-gl at all, which has the same result (gl=egl-angle,angle=default) as when defining none of both. So basically only the Chromium default leads to hardware acceleration, while passing any (other) --use-gl or --use-angle or a combination of both leads to “none” and “none” for both, disabling hardware acceleration.
Also, with panthor module loaded and panfrost unloaded, it does not work. So I assume Chromium does not support Panthor. Or does it just require a userspace driver as well? I am not at all any expert in all these GPU/graphics questions, drivers and APIs, as you notice 
.
What I do get from this is that we must remove --use-gl from our Chromium config for SBCs, as it seems to pick the correct driver from what is available, and we only break that. But I’ll test test on some other SBCs, and on Bullseye, as this changed at some point, i.e. --use-gl=egl was required on ARM SBCs to get hardware acceleration in Chromium.
It is the same on all SBCs. --use-gl=egl must be removed. I added a patch to next DietPi update, leaving it untouched on Bullseye, as testing this on all relevant SoCs costs too much time, including the generation of Bullseye images: dietpi-software: Chromium: fix hardware acceleration · MichaIng/DietPi@24097f1 · GitHub
Trying to make guesses like that would be a moving target anyway. This board does not ship with a serial header so I will have to install one and then gather logs from the next attempted boot.
This update sounds like it would enable chromium hw accelleration, but it seemed as though the entire GUI was lacking it when I tried installing any WM or DE over debian. (I may be missing something, apologies if so 
)
Indeed. Can you show the X11 logs, e.g. starting the X session via SSH and taking the output you see on SSH, or from the related log file?
It should be all defaults, but maybe an X11 config changes something:
cat << '_EOF_' > /etc/X11/xorg.conf
Section "Device"
Identifier "Rockchip Graphics"
Driver "modesetting"
Option "AccelMethod" "glamor"
Option "DRI" "2"
Option "Dri2Vsync" "true"
Option "TripleBuffer" "True"
EndSection
_EOF_
Actually, the last 3 options seem outdated, in the meantime, there is DRI3 etc. The X11 startup log might show something like "option xy is not used", so we know we can remove it. This is still the default Armbian config for RK3399 and some selected other boards with other chips.