Cant boot from emmc on RadxaZero

Creating a bug report/issue

Required Information

  • DietPi version | TBD
  • Distro version | TBD
  • Kernel version | TBD
  • SBC model | TBD
  • Power supply used | 5VDC Regulated >1A
  • SD card used | N/A

Steps to reproduce

  1. Flash DietPIimage to RadxaZero emmc
  2. attempt to boot

Expected behaviour

  • I was hoping the board would boot from emmc

Actual behaviour

  • its not booting from emmc

Extra details

See related forum post: Cant boot DietPI from emmc

u-boot console extract below:

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:0;0.0
                                                                      l2_stage_i                                                                                                             nit 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 194140

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part                                                                                                             : 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part:                                                                                                              0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part:                                                                                                              0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
00000000
emmc switch 2 ok
fastboot data verify
verify result: 265
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part:                                                                                                              0
00000000
emmc switch 0 ok

dmc_version 0000
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 2, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part:                                                                                                              0

dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part:                                                                                                              0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

channel==0
RxClkDly_Margin_A0==256 ps 13
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==31
DeviceVref_Margin_A0==39
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0


channel==1
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==75
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==31
DeviceVref_Margin_A0==39
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004

soc_vref_reg_value 0x 0000001b 0000001d 00000019 0000001b 0000001a 0000001c 0000                                                                                                             001b 0000001b 0000001d 0000001d 0000001c 0000001c 0000001e 0000001d 0000001c 000                                                                                                             0001e 0000001d 0000001d 0000001b 0000001c 0000001f 0000001e 0000001b 0000001c 00                                                                                                             00001b 0000001a 0000001c 0000001c 0000001a 0000001b 0000001a 0000001a dram_vref_                                                                                                             reg_value 0x 00000058
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass

100bdlr_step_size ps== 454
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part                                                                                                             : 0
Load BL3X from eMMC, src: 0x0006c200, des: 0x0175c000, size: 0x00098000, part: 0
bl2z: ptr: 05129330, size: 00001e40
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
OPS=0x30
ring efuse init
28 0c 30 00 01 17 2f 00 00 15 35 36 32 43 46 50
[0.017149 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):4fc40b1
NOTICE:  BL31: Built : 15:57:33, May 22 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2022.01-armbian (Jun 22 2022 - 07:17:10 +0000) radxa-zero

Model: Radxa Zero
SoC:   Amlogic Meson G12A (S905Y2) Revision 28:c (30:2)
DRAM:  2 GiB
MMC:   sd@ffe03000: 0, sd@ffe05000: 1, mmc@ffe07000: 2
Loading Environment from nowhere... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
Card did not respond to voltage select! : -110
Card did not respond to voltage select! : -110
unable to select a mode : -5
starting USB...
Bus usb@ff500000: Register 3000140 NbrPorts 3
Starting the controller
USB XHCI 1.10
scanning bus usb@ff500000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Device 0: unknown device
No ethernet found.
missing environment variable: pxeuuid
Retrieving file: pxelinux.cfg/00000000
No ethernet found.
Retrieving file: pxelinux.cfg/0000000
No ethernet found.
Retrieving file: pxelinux.cfg/000000
No ethernet found.
Retrieving file: pxelinux.cfg/00000
No ethernet found.
Retrieving file: pxelinux.cfg/0000
No ethernet found.
Retrieving file: pxelinux.cfg/000
No ethernet found.
Retrieving file: pxelinux.cfg/00
No ethernet found.
Retrieving file: pxelinux.cfg/0
No ethernet found.
Retrieving file: pxelinux.cfg/default-arm-meson-u200
No ethernet found.
Retrieving file: pxelinux.cfg/default-arm-meson
No ethernet found.
Retrieving file: pxelinux.cfg/default-arm
No ethernet found.
Retrieving file: pxelinux.cfg/default
No ethernet found.
Config file not found
No ethernet found.
No ethernet found.
=>

@MichaIng can you have a look.

I’ll update the image, there has been a U-Boot update in the meantime.

1 Like

Our Radxa Zero image(s) have been updated :slightly_smiling_face:.

1 Like

Hi Michalng,

The RZ seemed to get a bit further with the updated image but still diddn’t boot. I just got the image off the downloads section of the DietPi website, was that the correct place to get the image?

Serial console dump below.

Thanks,
Adrian

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:0;0.0
                                                                      l2_stage_i                                                                                                             nit 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 189313

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part                                                                                                             : 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part:                                                                                                              0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part:                                                                                                              0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
00000000
emmc switch 2 ok
fastboot data verify
verify result: 265
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part:                                                                                                              0
00000000
emmc switch 0 ok

dmc_version 0000
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 2, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part:                                                                                                              0

dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part:                                                                                                              0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

channel==0
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==32
DeviceVref_Margin_A0==39
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0


channel==1
RxClkDly_Margin_A0==197 ps 10
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==75
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==31
DeviceVref_Margin_A0==39
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004

soc_vref_reg_value 0x 0000001b 0000001e 00000019 0000001b 0000001b 0000001b 0000                                                                                                             001a 0000001d 0000001d 0000001d 0000001c 0000001d 0000001d 0000001d 0000001c 000                                                                                                             0001d 0000001d 0000001d 0000001c 0000001d 00000020 0000001e 0000001b 0000001d 00                                                                                                             00001c 0000001b 0000001c 0000001c 0000001a 0000001b 0000001b 0000001b dram_vref_                                                                                                             reg_value 0x 00000057
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass

100bdlr_step_size ps== 460
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part                                                                                                             : 0
Load BL3X from eMMC, src: 0x0006c200, des: 0x0175c000, size: 0x00098000, part: 0
bl2z: ptr: 05129330, size: 00001e40
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
OPS=0x30
ring efuse init
28 0c 30 00 01 17 2f 00 00 15 35 36 32 43 46 50
[0.017150 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):4fc40b1
NOTICE:  BL31: Built : 15:57:33, May 22 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast

<debug_uart>


U-Boot 2022.07-armbian (Oct 07 2022 - 16:11:17 +0000) radxa-zero

Model: Radxa Zero
SoC:   Amlogic Meson G12A (S905Y2) Revision 28:c (30:2)
DRAM:  2 GiB
Core:  383 devices, 23 uclasses, devicetree: separate
MMC:   sd@ffe03000: 0, sd@ffe05000: 1, mmc@ffe07000: 2
Loading Environment from nowhere... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
Card did not respond to voltage select! : -110
Card did not respond to voltage select! : -110
unable to select a mode : -5
starting USB...
Bus usb@ff500000: Register 3000140 NbrPorts 3
Starting the controller
USB XHCI 1.10
scanning bus usb@ff500000 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Device 0: unknown device
No ethernet found.
missing environment variable: pxeuuid
Retrieving file: pxelinux.cfg/00000000
No ethernet found.
Retrieving file: pxelinux.cfg/0000000
No ethernet found.
Retrieving file: pxelinux.cfg/000000
No ethernet found.
Retrieving file: pxelinux.cfg/00000
No ethernet found.
Retrieving file: pxelinux.cfg/0000
No ethernet found.
Retrieving file: pxelinux.cfg/000
No ethernet found.
Retrieving file: pxelinux.cfg/00
No ethernet found.
Retrieving file: pxelinux.cfg/0
No ethernet found.
Retrieving file: pxelinux.cfg/default-arm-meson-u200
No ethernet found.
Retrieving file: pxelinux.cfg/default-arm-meson
No ethernet found.
Retrieving file: pxelinux.cfg/default-arm
No ethernet found.
Retrieving file: pxelinux.cfg/default
No ethernet found.
Config file not found
No ethernet found.
No ethernet found.
=>

There has been another U-Boot update two days ago, but not sure if something really changed for Radxa Zero. The last eMMC related commit I could find has been merged this summer: Apply eMMC hack to Radxa Zero's U-Boot by RadxaYuntian · Pull Request #3958 · armbian/build · GitHub

Which eMMC module do you use?

The module on the board is Kingston emmc08g-t227.