Sorry for late reply… Coming back after a couple days without power.
I tried to document all the things I encountered, hoping it made sense.
I was saying the new (recent) dietpi images would not boot based on two things.
One the heartbeat LED not beating.
Two the board was not getting assigned an IP address via DHCP.
I did let the one run for an hour after power on and it never got a heartbeat or DHCP assigned address.
Meanwhile, installing a old image and upgrading to current and adding the extra parms to the boot.ini fixed the USB issue.
I’m hoping to get some more results on your last email but this is where we are at.
Older image installs and gets updated, USB doesn’t work, make the changes to the boot.ini and gets USB back.
New image installed and nothing happens. At least nothing I can tell happens.
Will try your suggestions and report back.
Hi I would like to know what are the updates to this thread.
I tried both images the latest one and cannot get any response from device.
I created an issue so we can link the problems with here.
opened 05:15PM - 15 Mar 23 UTC
Flash the image with Rufus and stick it into the sd slot on the ODROID-C1.
Im… age used : https://dietpi.com/downloads/images/DietPi_OdroidC1-ARMv7-Bullseye.7z
Serial Console logs:
```
QA5:A;SVN:B72;POC:17F;STS:0;BOOT:0;INIT:10;BOOT:1;INIT:0;READ:0;CHECK:0;PASS:1;
-----------------------------------------------------------------------
* Welcome to Hardkernel's ODROID-C... (Built at 19:33:00 Dec 8 2014) *
-----------------------------------------------------------------------
CPU : AMLogic S805
MEM : 1024MB (DDR3@792MHz)
BID : HKC1310001
S/N : HKC11122F37DE839
0x0000009f
check SD_boot_type:0x1 card_type:0x1
Loading U-boot...success.
U-boot-00000-gb7b8dc2-dirty(odroidc@b7b8dc21) (Mar 08 2021 - 18:45:29)
I2C: clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[25]=0
clear pinmux reg8[12]=0
clear pinmux reg1[3]=0
clear pinmux reg1[2]=0
set output en 0xc1108054[20]=1
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[25]=0
clear pinmux reg8[12]=0
clear pinmux reg1[3]=0
clear pinmux reg1[2]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[20]=0
set output val 0xc1108058[20]=0
clear pinmux reg1[25]=0
clear pinmux reg8[12]=0
clear pinmux reg1[3]=0
clear pinmux reg1[2]=0
set output en 0xc1108054[20]=1
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=fffcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffdcfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[25]=0
clear pinmux reg8[12]=0
clear pinmux reg1[3]=0
clear pinmux reg1[2]=0
out reg=c1108058,value=ffccfa00
set output en 0xc1108054[20]=0
set output val 0xc1108058[20]=0
clear pinmux reg1[24]=0
clear pinmux reg1[1]=0
out reg=c1108058,value=ffecfa00
set output en 0xc1108054[21]=0
set output val 0xc1108058[21]=0
clear pinmux reg1[25]=0
clear pinmux reg8[12]=0
clear pinmux reg1[3]=0
clear pinmux reg1[2]=0
set output en 0xc1108054[20]=1
clear pinmux reg1[25]=0
clear pinmux reg8[12]=0
clear pinmux reg1[3]=0
clear pinmux reg1[2]=0
set output en 0xc1108054[20]=1
clear pinmux reg1[25]=0
clear pinmux reg8[12]=0
clear pinmux reg1[3]=0
clear pinmux reg1[2]=0
set output en 0xc1108054[20]=1
ready
DRAM: 1 GiB
relocation Offset is: 2ff18000
MMC: SDCARD: 0, eMMC: 1
IR init is done!
vpu clk_level = 3
set vpu clk: 182150000Hz, readback: 182150000Hz(0x701)
mode = 6 vic = 4
set HDMI vic: 4
mode is: 6
viu chan = 1
config HPLL
config HPLL done
reconfig packet setting done
MMC read: dev # 0, block # 33984, count 12288 ... 12288 blocks read: OK
Error: Bad gzipped data
There is no valid bmp file at the given address
============================================================
Vendor: Man 035344 Snr dcee2413 Rev: 8.0 Prod: SC32G
Type: Removable Hard Disk
Capacity: 30436.5 MB = 29.7 GB (62333952 x 512)
------------------------------------------------------------
Partition Start Sector Num Sectors Type
1 8192 262144 c
2 270336 760088 83
============================================================
Net: Meson_Ethernet
init suspend firmware done. (ret:0)
Hit Enter key to stop autoboot -- : 0
exit abortboot: 0
reading boot.ini
3236 bytes read
Loading boot.ini from mmc0:1 (vfat)
Executing the script...
setenv m "1080p" # 1080P@60Hz
setenv vout "hdmi"
setenv m_bpp "32"
setenv monitor_onoff "true"
setenv condev "console=ttyAML0,115200n8 console=tty1"
setenv max_freq "1536"
if test "${hpd}" = "0"; then setenv hdmi_hpd "disablehpd=true"; fi
if test "${cec}" = "1"; then setenv hdmi_cec "hdmitx=cecf"; fi
if test "${disable_vu7}" = "false"; then setenv hid_quirks "usbhid.quirks=0x0eef:0x0005:0x0004"; fi
setenv bootargs "root=UUID=b83304f6-e29e-411d-ae85-421876dfcce1 rootfstype=ext4 rootwait rw ${condev} loglevel=4 no_console_suspend consoleblank=0 vdaccfg=0xa000 dmfc=3 cvbsmode=576cvbs hdmimode=${m} m_bpp=${m_bpp} vout=${vout} ${disableuhs} ${hdmi_hpd} ${hdmi_cec} ${enabledac} monitor_onoff=${monitor_onoff} max_freq=${max_freq} ${hid_quirks} ${extraargs}"
fatload mmc 0:1 0x20800000 uImage
reading uImage
Invalid FAT entry
** Unable to read "uImage" from mmc 0:1 **
fatload mmc 0:1 0x22000000 uInitrd
reading uInitrd
Invalid FAT entry
** Unable to read "uInitrd" from mmc 0:1 **
fatload mmc 0:1 0x21800000 dtb/meson8b-odroidc1.dtb
reading dtb/meson8b-odroidc1.dtb
Invalid FAT entry
** Unable to read "dtb/meson8b-odroidc1.dtb" from mmc 0:1 **
fdt addr 21800000
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
if test "${vpu}" = "0"; then fdt rm /mesonstream; fdt rm /vdec; fdt rm /ppmgr; fi
libfdt fdt_path_offset() returned FDT_ERR_BADMAGIC
libfdt fdt_path_offset() returned FDT_ERR_BADMAGIC
libfdt fdt_path_offset() returned FDT_ERR_BADMAGIC
if test "${hdmioutput}" = "0"; then fdt rm /mesonfb; fi
libfdt fdt_path_offset() returned FDT_ERR_BADMAGIC
bootm 0x20800000 0x22000000 0x21800000
Wrong Image Format for bootm command
ERROR: can't get kernel image!
▒
Unknown command '▒' - try 'help'
MMC read: dev # 0, block # 1216, count 16384 ... 16384 blocks read: OK
MMC read: dev # 0, block # 1088, count 128 ... 128 blocks read: OK
Wrong Image Format for bootm command
ERROR: can't get kernel image!
```
Old keep your issue/discussion on GitHub. No need to use 2 different platforms. It just double our efforts
I just posted the link in case that there is need for tracking the evolution for the issue.